26 #include <sys/times.h>
27 #include <sys/types.h>
28 #include <sys/socket.h>
30 #include <netinet/in.h>
33 #include <arpa/inet.h>
42 #define INVALID_SOCKET 0
43 #define SOCKET_ERROR -1
49 #define GET_LAST_SOCKET_ERROR() WSAGetLastError()
51 #define GET_LAST_SOCKET_ERROR() errno
54 #define GET_LAST_SOCKET_ERROR ??
60 #ifndef O22MAKELONG // makes a long from 4 bytes
61 #define O22MAKELONG(b0, b1, b2, b3) ((((uint32_t)(b0)) << 24) | (((uint32_t)(b1)) << 16) | (((uint32_t)(b2)) << 8) | ((uint32_t)(b3)))
64 #ifndef O22MAKELONG2 // makes a long from 4 bytes
65 #define O22MAKELONG2(a, o) ((((uint32_t)(a[o])) << 24) | (((uint32_t)(a[o+1])) << 16) | (((uint32_t)(a[o+2])) << 8) | ((uint32_t)(a[o+3])))
68 #ifndef O22MAKEFLOAT // makes a float from 4 bytes
69 #define O22MAKEFLOAT(pf, b0, b1, b2, b3) ((uint8_t*)pf)[0] = b3 ; ((uint8_t*)pf)[1] = b2 ; ((uint8_t*)pf)[2] = b1 ; ((uint8_t*)pf)[3] = b0 ;
72 float O22MAKEFLOAT2(uint8_t * a,
int o);
74 #ifndef O22MAKEWORD // makes a word from 2 bytes
75 #define O22MAKEWORD(b0, b1) (((uint16_t)((uint8_t)(b0))) << 8) | (uint16_t)(((uint8_t)(b1)))
78 #ifndef O22MAKEWORD2 // makes a word from 2 bytes
79 #define O22MAKEWORD2(a, o) (((uint16_t)((uint8_t)(a[o]))) << 8) | (uint16_t)(((uint8_t)(a[o+1])))
82 #ifndef O22MAKEBYTE2 // makes a byte from 1 byte, for consistency with other macros
83 #define O22MAKEBYTE2(a, o) a[o]
86 #ifndef O22MAKEDWORD // makes a dwords from 2 words
87 #define O22MAKEDWORD(w0, w1) (((uint32_t)((uint16_t)(w0))) << 16) | (uint32_t)(((uint16_t)(w1)))
93 #ifndef O22LOWORD // gets the low word from a dword
94 #define O22LOWORD(l) ((uint16_t)(l))
97 #ifndef O22HIWORD // gets the high word from a dword
98 #define O22HIWORD(l) ((uint16_t)(((uint32_t)(l) >> 16) & 0xFFFF))
101 #ifndef O22LOBYTE // gets the low byte from a word
102 #define O22LOBYTE(w) ((uint8_t)(w))
105 #ifndef O22HIBYTE // gets the high byte from a word
106 #define O22HIBYTE(w) ((uint8_t)(((uint16_t)(w) >> 8) & 0xFF))
109 #ifndef O22BYTE0 // gets the first byte from a dword
110 #define O22BYTE0(l) ((uint8_t)(((uint32_t)(l) >> 24) & 0xFF))
113 #ifndef O22BYTE1 // gets the second byte from a dword
114 #define O22BYTE1(l) ((uint8_t)(((uint32_t)(l) >> 16) & 0xFF))
117 #ifndef O22BYTE2 // gets the third byte from a dword
118 #define O22BYTE2(l) ((uint8_t)(((uint32_t)(l) >> 8) & 0xFF))
121 #ifndef O22BYTE3 // gets the fourth byte from a dword
122 #define O22BYTE3(l) ((uint8_t)(l))
125 #ifndef O22FILL_ARRAY_FROM_INT16 // Fill the given byte array with a short
126 #define O22FILL_ARRAY_FROM_INT16(a,i,n) a[i] = O22HIBYTE(n); a[i+1] = O22LOBYTE(n);
129 #ifndef O22FILL_ARRAY_FROM_INT32 // Fill the given byte array with a long
130 #define O22FILL_ARRAY_FROM_INT32(a,i,n) a[i] = O22BYTE0(n); a[i+1] = O22BYTE1(n); a[i+2] = O22BYTE2(n); a[i+3] = O22BYTE3(n)
133 #ifndef O22FILL_ARRAY_FROM_FLOAT // Fill the given byte array with a float
134 #define O22FILL_ARRAY_FROM_FLOAT(a,i,f) O22FILL_ARRAY_FROM_INT32(a, i, *((int32_t*)(&f)))
137 void O22FILL_ARRAY_FROM_FLOATX(uint8_t * a, int32_t i,
float f);
139 void O22FILL_ARRAY_FROM_FLOAT_LIT(uint8_t * a, int32_t i,
float f);
142 #ifndef O22_SWAP_BYTES_LONG // swap the bytes in a long
143 #define O22_SWAP_BYTES_LONG(l) O22MAKELONG(O22BYTE3(l), O22BYTE2(l), O22BYTE1(l), O22BYTE0(l))
147 #define array_length( a ) (sizeof(a)/sizeof(a[0]))
152 #define SIOMM_ERROR -1
153 #define SIOMM_TIME_OUT -2
154 #define SIOMM_ERROR_NO_SOCKETS -3 // Unable to access socket interface
155 #define SIOMM_ERROR_CREATING_SOCKET -4
156 #define SIOMM_ERROR_CONNECTING_SOCKET -5
157 #define SIOMM_ERROR_RESPONSE_BAD -6
158 #define SIOMM_ERROR_NOT_CONNECTED_YET -7
159 #define SIOMM_ERROR_OUT_OF_MEMORY -8
160 #define SIOMM_ERROR_NOT_CONNECTED -9
161 #define SIOMM_ERROR_STREAM_TYPE_BAD -10
162 #define SIOMM_ERROR_LENGTH_BAD -11
163 #define SIOMM_ERROR_INDEX_BAD -12
164 #define SIOMM_ERROR_PARTIAL_SUCCESS -13
165 #define SIOMM_ERROR_INCORRECT_LENGTH_SENT -14
166 #define SIOMM_ERROR_UNEXPECTED_SELECT_RESULT -15
167 #define SIOMM_ERROR_GRACEFULLY_CLOSED -16
168 #define SIOMM_ERROR_WRONG_NUM_BYTES_RETURNED -17
169 #define SIOMM_ERROR_UNEXPECTED_RECV_RESULT -18
170 #define SIOMM_ERROR_INCORRECT_TCODE_RECIEVED -19
171 #define SIOMM_ERROR_INCORRECT_TLABEL_RECIEVED -20
172 #define SIOMM_ERROR_UNEXPECTED_CLOSE_RESULT -21
173 #define SIOMM_ERROR_INVALID_SERIAL_ADDRESS -22
174 #define SIOMM_ERROR_SERIAL_PORT_IN_USE -23
175 #define SIOMM_ERROR_SERIAL_MISMATCHED_CRC -24
176 #define SIOMM_ERROR_SERIAL_TIMEOUT -25
177 #define SIOMM_ERROR_NOT_IMPLEMENTED -26
180 #define SIOMM_BRAIN_ERROR_BASE 0xE000
181 #define SIOMM_BRAIN_ERROR_UNDEFINED_CMD 0xE001
182 #define SIOMM_BRAIN_ERROR_INVALID_PT_TYPE 0xE002
183 #define SIOMM_BRAIN_ERROR_INVALID_FLOAT 0xE003
184 #define SIOMM_BRAIN_ERROR_PUC_EXPECTED 0xE004
185 #define SIOMM_BRAIN_ERROR_INVALID_ADDRESS 0xE005
186 #define SIOMM_BRAIN_ERROR_INVALID_CMD_LENGTH 0xE006
187 #define SIOMM_BRAIN_ERROR_RESERVED 0xE007
188 #define SIOMM_BRAIN_ERROR_BUSY 0xE008
189 #define SIOMM_BRAIN_ERROR_CANT_ERASE_FLASH 0xE009
190 #define SIOMM_BRAIN_ERROR_CANT_PROG_FLASH 0xE00A
191 #define SIOMM_BRAIN_ERROR_IMAGE_TOO_SMALL 0xE00B
192 #define SIOMM_BRAIN_ERROR_IMAGE_CRC_MISMATCH 0xE00C
193 #define SIOMM_BRAIN_ERROR_IMAGE_LEN_MISMATCH 0xE00D
194 #define SIOMM_BRAIN_ERROR_FEATURE_NOT_IMPL 0xE00E
195 #define SIOMM_BRAIN_ERROR_WATCHDOG_TIMEOUT 0xE00F
198 #define SIOMM_TCP SOCK_STREAM
199 #define SIOMM_UDP SOCK_DGRAM
202 uint16_t Crc16R(
const uint8_t *pu8aryStr, uint32_t dwLength);
204 const uint16_t waryCrc16r_Table [256] =
206 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
207 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
208 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
209 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
210 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
211 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
212 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
213 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640, 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
214 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240, 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
215 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
216 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
217 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640, 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
218 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241, 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
219 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40, 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
220 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
221 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040
226 #define MEMORY_SERIALPASSTHRU_CFG0 0xF0329000 // Serial Pass Through Config (Port 0).
227 #define MEMORY_SERIALPASSTHRU_RW0 0xF0329100 // Serial Pass Through R/W Buffer (Port 0).
228 #define MEMORY_SERIALPASSTHRU_CFG1 0xF032A000 // Serial Pass Through Config (Port 1).
229 #define MEMORY_SERIALPASSTHRU_RW1 0xF032A100 // Serial Pass Through R/W Buffer (Port 1).
230 #define MEMORY_SERIALPASSTHRU_CFG2 0xF032B000 // Serial Pass Through Config (Port 2).
231 #define MEMORY_SERIALPASSTHRU_RW2 0xF032B100 // Serial Pass Through R/W Buffer (Port 2).
232 #define MEMORY_SERIALPASSTHRU_CFG3 0xF032C000 // Serial Pass Through Config (Port 3).
233 #define MEMORY_SERIALPASSTHRU_RW3 0xF032C100 // Serial Pass Through R/W Buffer (Port 3).
234 #define MEMORY_SERIALPASSTHRU_CFG4 0xF032D000 // Serial Pass Through Config (Port 4).
235 #define MEMORY_SERIALPASSTHRU_RW4 0xF032D100 // Serial Pass Through R/W Buffer (Port 4).
236 #define MEMORY_SERIALPASSTHRU_CFG5 0xF032E000 // Serial Pass Through Config (Port 5).
237 #define MEMORY_SERIALPASSTHRU_RW5 0xF032E100 // Serial Pass Through R/W Buffer (Port 5).
240 #define SIOMM_TCODE_WRITE_QUAD_REQUEST 0
241 #define SIOMM_TCODE_WRITE_BLOCK_REQUEST 1
242 #define SIOMM_TCODE_WRITE_RESPONSE 2
243 #define SIOMM_TCODE_READ_QUAD_REQUEST 4
244 #define SIOMM_TCODE_READ_BLOCK_REQUEST 5
245 #define SIOMM_TCODE_READ_QUAD_RESPONSE 6
246 #define SIOMM_TCODE_READ_BLOCK_RESPONSE 7
249 #define SIOMM_SIZE_WRITE_QUAD_REQUEST 16
250 #define SIOMM_SIZE_WRITE_BLOCK_REQUEST 16
251 #define SIOMM_SIZE_WRITE_RESPONSE 12
252 #define SIOMM_SIZE_READ_QUAD_REQUEST 12
253 #define SIOMM_SIZE_READ_QUAD_RESPONSE 16
254 #define SIOMM_SIZE_READ_BLOCK_REQUEST 16
255 #define SIOMM_SIZE_READ_BLOCK_RESPONSE 16
258 #define SIOMM_RESPONSE_CODE_ACK 0
259 #define SIOMM_RESPONSE_CODE_NAK 7
264 #define SIOMM_STATUS_READ_BASE 0xF0300000
265 #define SIOMM_STATUS_READ_PUC_FLAG 0xF0300004
266 #define SIOMM_STATUS_READ_LAST_ERROR 0xF030000C
267 #define SIOMM_STATUS_READ_BOOTP_FLAG 0xF0300048
268 #define SIOMM_STATUS_READ_DEGREES_FLAG 0xF030004C
269 #define SIOMM_STATUS_READ_WATCHDOG_TIME 0xF0300054
270 #define SIOMM_STATUS_READ_PART_NUMBER 0xF0300080
271 #define SIOMM_STATUS_READ_PART_NUMBER_SIZE 0x00000020
274 #define SIOMM_DATE_AND_TIME_BASE 0xF0350000
275 #define SIOMM_DATE_AND_TIME_SIZE 0x00000017
279 #define SIOMM_SERIAL_MODULE_CONFIG_BASE 0xF03A8000
280 #define SIOMM_SERIAL_MODULE_CONFIG_BOUNDARY 0x00000010
281 #define SIOMM_SERIAL_MODULE_EOM_BASE 0xF03A8200
282 #define SIOMM_SERIAL_MODULE_EOM_BOUNDARY 0x00000010
285 #define SIOMM_STATUS_WRITE_OPERATION 0xF0380000
286 #define SIOMM_STATUS_WRITE_BASE 0xF0380004
287 #define SIOMM_STATUS_WRITE_BOOTP 0xF0380004
288 #define SIOMM_STATUS_WRITE_TEMP_DEGREES 0xF0380008
289 #define SIOMM_STATUS_WRITE_WATCHDOG_TIME 0xF0380010
292 #define SIOMM_STREAM_CONFIG_BASE 0xF03FFFC4
293 #define SIOMM_STREAM_CONFIG_ON_FLAG 0xF03FFFD0
294 #define SIOMM_STREAM_CONFIG_INTERVAL 0xF03FFFD4
295 #define SIOMM_STREAM_CONFIG_PORT 0xF03FFFD8
297 #define SIOMM_STREAM_TARGET_BOUNDARY 0x00000004
298 #define SIOMM_STREAM_TARGET_BASE 0xF03FFFE0
301 #define SIOMM_DBANK_READ_AREA_BASE 0xF0400000
302 #define SIOMM_DBANK_READ_POINT_STATES 0xF0400000
303 #define SIOMM_DBANK_READ_ON_LATCH_STATES 0xF0400008
304 #define SIOMM_DBANK_READ_OFF_LATCH_STATES 0xF0400010
305 #define SIOMM_DBANK_READ_ACTIVE_COUNTERS 0xF0400018
306 #define SIOMM_DBANK_READ_COUNTER_DATA_BASE 0xF0400100
307 #define SIOMM_DBANK_READ_COUNTER_DATA_BOUNDARY 0x00000004
308 #define SIOMM_DBANK_MAX_FEATURE_ELEMENTS 0x00000040
311 #define SIOMM_DBANK_WRITE_AREA_BASE 0xF0500000
312 #define SIOMM_DBANK_WRITE_TURN_ON_MASK 0xF0500000
313 #define SIOMM_DBANK_WRITE_TURN_OFF_MASK 0xF0500008
314 #define SIOMM_DBANK_WRITE_ACT_COUNTERS_MASK 0xF0500010
315 #define SIOMM_DBANK_WRITE_DEACT_COUNTERS_MASK 0xF0500018
318 #define SIOMM_ABANK_READ_AREA_BASE 0xF0600000
319 #define SIOMM_ABANK_READ_POINT_VALUES 0xF0600000
320 #define SIOMM_ABANK_READ_POINT_COUNTS 0xF0600100
321 #define SIOMM_ABANK_READ_POINT_MIN_VALUES 0xF0600200
322 #define SIOMM_ABANK_READ_POINT_MAX_VALUES 0xF0600300
325 #define SIOMM_ABANK_WRITE_AREA_BASE 0xF0700000
326 #define SIOMM_ABANK_WRITE_POINT_VALUES 0xF0700000
327 #define SIOMM_ABANK_WRITE_POINT_COUNTS 0xF0700100
329 #define SIOMM_ABANK_MAX_BYTES 0x00000100
330 #define SIOMM_ABANK_MAX_ELEMENTS 0x00000040
334 #define SIOMM_DPOINT_READ_BOUNDARY 0x00000040
335 #define SIOMM_DPOINT_READ_AREA_BASE 0xF0800000
336 #define SIOMM_DPOINT_READ_STATE 0xF0800000
337 #define SIOMM_DPOINT_READ_ONLATCH_STATE 0xF0800004
338 #define SIOMM_DPOINT_READ_OFFLATCH_STATE 0xF0800008
339 #define SIOMM_DPOINT_READ_ACTIVE_COUNTER 0xF080000C
340 #define SIOMM_DPOINT_READ_COUNTER_DATA 0xF0800010
343 #define SIOMM_DPOINT_WRITE_BOUNDARY 0x00000040
344 #define SIOMM_DPOINT_WRITE_TURN_ON_BASE 0xF0900000
345 #define SIOMM_DPOINT_WRITE_TURN_OFF_BASE 0xF0900004
346 #define SIOMM_DPOINT_WRITE_ACTIVATE_COUNTER 0xF0900008
347 #define SIOMM_DPOINT_WRITE_DEACTIVATE_COUNTER 0xF090000C
350 #define SIOMM_APOINT_READ_BOUNDARY 0x00000040
351 #define SIOMM_APOINT_READ_AREA_BASE 0xF0A00000
352 #define SIOMM_APOINT_READ_VALUE_BASE 0xF0A00000
353 #define SIOMM_APOINT_READ_COUNTS_BASE 0xF0A00004
354 #define SIOMM_APOINT_READ_MIN_VALUE_BASE 0xF0A00008
355 #define SIOMM_APOINT_READ_MAX_VALUE_BASE 0xF0A0000C
356 #define SIOMM_APOINT_READ_TPO_PERIOD_BASE 0xF0B0000C
359 #define SIOMM_APOINT_WRITE_BOUNDARY 0x00000040
360 #define SIOMM_APOINT_WRITE_VALUE_BASE 0xF0B00000
361 #define SIOMM_APOINT_WRITE_COUNTS_BASE 0xF0B00004
362 #define SIOMM_APOINT_WRITE_TPO_PERIOD_BASE 0xF0B0000C
365 #define SIOMM_POINT_CONFIG_BOUNDARY 0x00000040
366 #define SIOMM_POINT_CONFIG_READ_MOD_TYPE_BASE 0xF0C00000
367 #define SIOMM_POINT_CONFIG_WRITE_TYPE_BASE 0xF0C00004
368 #define SIOMM_POINT_CONFIG_WRITE_FEATURE_BASE 0xF0C00008
369 #define SIOMM_POINT_CONFIG_WRITE_OFFSET_BASE 0xF0C0000C
370 #define SIOMM_POINT_CONFIG_WRITE_GAIN_BASE 0xF0C00010
371 #define SIOMM_POINT_CONFIG_WRITE_HISCALE_BASE 0xF0C00014
372 #define SIOMM_POINT_CONFIG_WRITE_LOSCALE_BASE 0xF0C00018
373 #define SIOMM_POINT_CONFIG_WRITE_FILTER_BASE 0xF0C00020
374 #define SIOMM_POINT_CONFIG_WRITE_WDOG_VALUE_BASE 0xF0C00024
375 #define SIOMM_POINT_CONFIG_WRITE_WDOG_ENABLE_BASE 0xF0C00028
376 #define SIOMM_POINT_CONFIG_WRITE_NAME_BASE 0xF0C00030
377 #define SIOMM_POINT_CONFIG_NAME_SIZE 0x00000010
378 #define SIOMM_POINT_CONFIG_NAME_SIZE_NO_NULL 0x0000000F
379 #define SIOMM_POINT_CONFIG_CLAMP_BOUNDARY 0x00000008
380 #define SIOMM_POINT_CONFIG_WRITE_LOCLAMP_BASE 0xF0C01000
381 #define SIOMM_POINT_CONFIG_WRITE_HICLAMP_BASE 0xF0C01004
383 #define SIOMM_PIDLOOP_CONFIG_BOUNDARY 0x00000080
384 #define SIOMM_PIDLOOP_CONFIG_BASE 0xF2100000
385 #define SIOMM_PIDLOOP_CONFIG_GAIN_BASE 0xF2100010
387 #define SIOMM_TPO_CONFIG_BOUNDARY 0x00000030
388 #define SIOMM_TPO_CONFIG_MEMMAP_BASE 0xF08C4000
389 #define SIOMM_TPO_CONFIG_OUTPUT_MEMMAP_BASE 0xF08C401C
390 #define SIOMM_TPO_ON_MASK_BASE 0XF08C0040
391 #define SIOMM_TPO_OFF_MASK_BASE 0XF08C0080
393 #define SIOMM_EVENT_MSG_BOUNDARY 0x000000C0
394 #define SIOMM_EVENT_MSG_MEMMAP_BASE 0xF1200000
395 #define SIOMM_EVENT_MSG_MSG_LENGTH 0x00000080
397 #define SIOMM_DIGITAL_EVENT_BOUNDARY 0x00000040
398 #define SIOMM_DIGITAL_EVENT_MEMMAP_BASE 0xF0D00000
400 #define SIOMM_ALARM_EVENT_BOUNDARY 0x00000080
401 #define SIOMM_ALARM_EVENT_MEMMAP_BASE 0xF1100000
403 #define SIOMM_SERIAL_EVENT_BOUNDARY 0x00000074
404 #define SIOMM_SERIAL_EVENT_MEMMAP_BASE 0xF1540000
406 #define SIOMM_TIMER_EVENT_BOUNDARY 0x00000080
407 #define SIOMM_TIMER_EVENT_MEMMAP_BASE 0xF0D40000
408 #define SIOMM_TIMER_EVENT_MEMMAP_END 0xF0D4FFFF
412 #define SIOMM_DPOINT_READ_CLEAR_BOUNDARY 0x00000004
413 #define SIOMM_DPOINT_READ_CLEAR_COUNTS_BASE 0xF0F00000
414 #define SIOMM_DPOINT_READ_CLEAR_ON_LATCH_BASE 0xF0F00100
415 #define SIOMM_DPOINT_READ_CLEAR_OFF_LATCH_BASE 0xF0F00200
418 #define SIOMM_APOINT_READ_CLEAR_BOUNDARY 0x00000004
419 #define SIOMM_APOINT_READ_CLEAR_MIN_VALUE_BASE 0xF0F80000
420 #define SIOMM_APOINT_READ_CLEAR_MAX_VALUE_BASE 0xF0F80100
423 #define SIOMM_APOINT_READ_CALC_SET_BOUNDARY 0x00000004
424 #define SIOMM_APOINT_READ_CALC_SET_OFFSET_BASE 0xF0E00000
425 #define SIOMM_APOINT_READ_CALC_SET_GAIN_BASE 0xF0E00100
428 #define SIOMM_STREAM_READ_AREA_BASE 0xF1000000
429 #define SIOMM_STREAM_READ_AREA_SIZE 0x00000220
432 #define SIOMM_SCRATCHPAD_BITS_BASE 0xF0D80000
433 #define SIOMM_SCRATCHPAD_BITS_ON_MASK_BASE 0xF0D80400
434 #define SIOMM_SCRATCHPAD_BITS_OFF_MASK_BASE 0xF0D80408
435 #define SIOMM_SCRATCHPAD_INTEGER_BOUNDARY 0x00000004
436 #define SIOMM_SCRATCHPAD_INTEGER_BASE 0xF0D81000
437 #define SIOMM_SCRATCHPAD_INTEGER_BASE1 0xF0D81000
438 #define SIOMM_SCRATCHPAD_INTEGER_BASE2 0xF0DA0000
439 #define SIOMM_SCRATCHPAD_INTEGER_BASE3 0xF0DA2000
440 #define SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS1 0x00000400
441 #define SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS2 0x00000800
442 #define SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS3 0x00001C00
443 #define SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS \
444 SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS1 + \
445 SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS2 + \
446 SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS3
447 #define SIOMM_SCRATCHPAD_INTEGER_MAX_BYTES \
448 SIOMM_SCRATCHPAD_INTEGER_MAX_ELEMENTS * 4
449 #define SIOMM_SCRATCHPAD_FLOAT_BOUNDARY 0x00000004
450 #define SIOMM_SCRATCHPAD_FLOAT_BASE 0xF0D82000
451 #define SIOMM_SCRATCHPAD_FLOAT_BASE1 0xF0D82000
452 #define SIOMM_SCRATCHPAD_FLOAT_BASE2 0xF0DC0000
453 #define SIOMM_SCRATCHPAD_FLOAT_BASE3 0xF0DC2000
454 #define SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS1 0x00000400
455 #define SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS2 0x00000800
456 #define SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS3 0x00001C00
457 #define SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS \
458 SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS1 + \
459 SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS2 + \
460 SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS3
461 #define SIOMM_SCRATCHPAD_FLOAT_MAX_BYTES \
462 SIOMM_SCRATCHPAD_FLOAT_MAX_ELEMENTS * 4
463 #define SIOMM_SCRATCHPAD_STRING_BASE 0xF0D83000
464 #define SIOMM_SCRATCHPAD_STRING_LENGTH_BASE 0xF0D83000
465 #define SIOMM_SCRATCHPAD_STRING_LENGTH_SIZE 0x00000002
466 #define SIOMM_SCRATCHPAD_STRING_DATA_BASE 0xF0D83002
467 #define SIOMM_SCRATCHPAD_STRING_DATA_SIZE 0x00000080
468 #define SIOMM_SCRATCHPAD_STRING_BOUNDARY 0x00000082
469 #define SIOMM_SCRATCHPAD_STRING_MAX_BYTES 0x00000410
470 #define SIOMM_SCRATCHPAD_STRING_MAX_ELEMENTS 0x00000008
471 #define SIOMM_SCRATCHPAD_INTEGER_64_BASE 0xF0DE0000
472 #define SIOMM_SCRATCHPAD_INTEGER_64_MAX_ELEMENTS 0x00000400
475 #define SIOMM_BLOCK_MAX_BYTES 0x00000400
476 #define SIOMM_BLOCK_AS_INT_MAX_ELEMENTS 0x00004000 // Have a limit just
477 #define SIOMM_BLOCK_AS_FLT_MAX_ELEMENTS 0x00004000 // to keep things
481 #define SIOMM_DATALOG_SAMPLES_BASE 0xF3020000
482 #define SIOMM_DATALOG_SAMPLES_BOUNDARY 0x00000014
483 #define SIOMM_DATALOG_SAMPLES_READ_BLOCK_COUNT 50
484 #define SIOMM_DATALOG_SAMPLES_READ_BLOCK_SIZE \
485 SIOMM_DATALOG_SAMPLES_BOUNDARY * \
486 SIOMM_DATALOG_SAMPLES_READ_BLOCK_COUNT
487 #define SIOMM_DATALOG_SAMPLES_ORIG_LENGTH 300 // The original size
489 #define SIOMM_DATALOG_SAMPLES_MEMMAP_OFFSET 8
490 #define SIOMM_DATALOG_SAMPLES_FORMAT_OFFSET 12
491 #define SIOMM_DATALOG_SAMPLES_DATA_OFFSET 16
495 #define SIOMM4096_DPOINT_READ_BOUNDARY 0x00000040
496 #define SIOMM4096_DPOINT_READ_AREA_BASE 0xF1808000
497 #define SIOMM4096_DPOINT_READ_STATE 0xF1808000
498 #define SIOMM4096_DPOINT_READ_ONLATCH_STATE 0xF1808008
499 #define SIOMM4096_DPOINT_READ_OFFLATCH_STATE 0xF1808010
500 #define SIOMM4096_DPOINT_READ_COUNTER_BOUNDARY 0x00000100
501 #define SIOMM4096_DPOINT_READ_COUNTER_DATA 0xF1809000
504 #define SIOMM4096_DPOINT_WRITE_BOUNDARY 0x00000040
505 #define SIOMM4096_DPOINT_WRITE_TURN_ON_BASE 0xF180C000
506 #define SIOMM4096_DPOINT_WRITE_TURN_OFF_BASE 0xF180C008
509 #define SIOMM4096_DPOINT_READCLEAR_LATCH_BOUNDARY 0x00000020
510 #define SIOMM4096_DPOINT_READCLEAR_ONLATCH 0xF180A000
511 #define SIOMM4096_DPOINT_READCLEAR_OFFLATCH 0xF180A008
512 #define SIOMM4096_DPOINT_READCLEAR_COUNTER_BOUNDARY 0x00000100
513 #define SIOMM4096_DPOINT_READCLEAR_COUNTER 0xF180B000
516 #define SIOMM4096_APOINT_READ_BOUNDARY 0x00000040
517 #define SIOMM4096_APOINT_READ_POINT_OFFSET 0x00000040
518 #define SIOMM4096_APOINT_READ_MODULE_OFFSET 0x00001000
519 #define SIOMM4096_APOINT_READ_AREA_BASE 0xF0260000
520 #define SIOMM4096_APOINT_READ_VALUE_BASE 0xF0260000
521 #define SIOMM4096_APOINT_READ_COUNTS_BASE 0xF0260004
522 #define SIOMM4096_APOINT_READ_MIN_VALUE_BASE 0xF0260008
523 #define SIOMM4096_APOINT_READ_MAX_VALUE_BASE 0xF026000C
524 #define SIOMM4096_APOINT_READ_RAW_COUNTS_BASE 0xF0260024
525 #define SIOMM4096_APOINT_READ_TPO_PERIOD_BASE 0xF02A000C
528 #define SIOMM4096_APOINT_WRITE_BOUNDARY 0x00000040
529 #define SIOMM4096_APOINT_WRITE_POINT_OFFSET 0x00000040
530 #define SIOMM4096_APOINT_WRITE_MODULE_OFFSET 0x00001000
531 #define SIOMM4096_APOINT_WRITE_AREA_BASE 0xF02A0000
532 #define SIOMM4096_APOINT_WRITE_VALUE_BASE 0xF02A0000
533 #define SIOMM4096_APOINT_WRITE_COUNTS_BASE 0xF02A0004
534 #define SIOMM4096_APOINT_WRITE_TPO_PERIOD_BASE 0xF02A000C
537 #define SIOMM4096_POINT_CONFIG_BOUNDARY 0x000000C0
538 #define SIOMM4096_POINT_CONFIG_AREA_BASE 0xF0100000
539 #define SIOMM4096_POINT_CONFIG_READ_MOD_TYPE_BASE 0xF0100000
540 #define SIOMM4096_POINT_CONFIG_WRITE_TYPE_BASE 0xF0100004
541 #define SIOMM4096_POINT_CONFIG_WRITE_FEATURE_BASE 0xF0100008
542 #define SIOMM4096_POINT_CONFIG_WRITE_OFFSET_BASE 0xF010000C
543 #define SIOMM4096_POINT_CONFIG_WRITE_GAIN_BASE 0xF0100010
544 #define SIOMM4096_POINT_CONFIG_WRITE_HISCALE_BASE 0xF0100014
545 #define SIOMM4096_POINT_CONFIG_WRITE_LOSCALE_BASE 0xF0100018
546 #define SIOMM4096_POINT_CONFIG_WRITE_FILTER_BASE 0xF0100020
547 #define SIOMM4096_POINT_CONFIG_WRITE_WDOG_VALUE_BASE 0xF0100024
548 #define SIOMM4096_POINT_CONFIG_WRITE_WDOG_ENABLE_BASE 0xF0100028
549 #define SIOMM4096_POINT_CONFIG_WRITE_NAME_BASE 0xF0100030
550 #define SIOMM4096_POINT_CONFIG_NAME_SIZE 0x00000033
551 #define SIOMM4096_POINT_CONFIG_NAME_SIZE_NO_NULL 0x00000032
552 #define SIOMM4096_POINT_CONFIG_WRITE_LOCLAMP_BASE 0xF01000B8
553 #define SIOMM4096_POINT_CONFIG_WRITE_HICLAMP_BASE 0xF01000BC
556 #define SIOMM4096_DPOINT_READ_CLEAR_BOUNDARY 0x0000000C
557 #define SIOMM4096_DPOINT_READ_CLEAR_COUNTS_BASE 0xF01C8000
558 #define SIOMM4096_DPOINT_READ_CLEAR_ON_LATCH_BASE 0xF01C8004
559 #define SIOMM4096_DPOINT_READ_CLEAR_OFF_LATCH_BASE 0xF01C8008
562 #define SIOMM4096_APOINT_READ_CLEAR_BOUNDARY 0x0000000C
563 #define SIOMM4096_APOINT_READ_CLEAR_BASE 0xF01D4000
564 #define SIOMM4096_APOINT_READ_CLEAR_POINT_OFFSET 0x0000000C
565 #define SIOMM4096_APOINT_READ_CLEAR_MODULE_OFFSET 0x00000300
566 #define SIOMM4096_APOINT_READ_CLEAR_MIN_VALUE_BASE 0xF01D4000
567 #define SIOMM4096_APOINT_READ_CLEAR_MAX_VALUE_BASE 0xF01D4004
570 #define SIOMM4096_APOINT_READ_CALC_SET_BOUNDARY 0x00000008
571 #define SIOMM4096_APOINT_READ_CALC_SET_OFFSET_BASE 0xF01C0000
572 #define SIOMM4096_APOINT_READ_CALC_SET_GAIN_BASE 0xF01C0004
576 #define SIOMM4096_MAX_POINTS 64
577 #define SIOMM4096_MAX_MODULES 64
580 unsigned int GetPassThruConfigAddress(
int port);
581 unsigned int GetPassThruReadWriteAddress(
int port);
583 #endif // __O22SIOUT_H_